Published on May 23, 2021–Updated on July 12, 2022
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e-Guest Lecture: Salvatore Monteleone
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Design and Application of Energy Efficient Emerging NoC Architectures (E3NoC)
Dr. Salvatore Monteleone, University of Catania, is fellow-in-residence at CY AS, invited by laboratory ETIS
In recent years, the demand for computing power has seen constant growth thanks to the boost provided by the spread of new technologies with specific computing needs. Consider, for example, the increasing adoption in a plethora of application domains of solutions based on Artificial Intelligence (AI), preferred in terms of adaptability and speed of implementation to those based on hand-crafted algorithms. This growing demand puts pressure on the design and development of power and area efficient computing architectures at different scales from High-Performance Computing (HPC), through hardware accelerators, down to mobile and wearable scenarios.
The guest lecture will present the Network-on-Chip (NoC) paradigm, which makes the design of many-core computing architectures more straightforward, its limitations, and how to overcome them to achieve a higher performance level. Particular attention will be given to the design practices and application of this paradigm in energy-efficient scenarios and the tools introduced to support them.
Bio: Salvatore Monteleone obtained his Ph.D. degree in Communications and Computer Engineering at University of Catania (2014). His interests comprehend Cyber-Physical Systems, User-Centric Systems, and Network-on-Chip architectures. He is currently a research fellow within the Fellows-in-Residence program (CY Advanced Studies) at ETIS Lab (UMR 8051 CNRS), ENSEA, CY Cergy Paris University.